/** * Gets the instruction prefix required, if any, to use in an expanded * version of this instance. Will not generate moves for registers * marked compatible to the format by the given BitSet. * * @see #expandedVersion * * @param compatRegs {@code non-null;} set of compatible registers * @return {@code null-ok;} the prefix, if any */ public DalvInsn expandedPrefix(BitSet compatRegs) { RegisterSpecList regs = registers; boolean firstBit = compatRegs.get(0); if (hasResult()) compatRegs.set(0); regs = regs.subset(compatRegs); if (hasResult()) compatRegs.set(0, firstBit); if (regs.size() == 0) return null; return new HighRegisterPrefix(position, regs); }
/** * Gets the instruction prefix required, if any, to use in an expanded * version of this instance. Will not generate moves for registers * marked compatible to the format by the given BitSet. * * @see #expandedVersion * * @param compatRegs {@code non-null;} set of compatible registers * @return {@code null-ok;} the prefix, if any */ public DalvInsn expandedPrefix(BitSet compatRegs) { RegisterSpecList regs = registers; boolean firstBit = compatRegs.get(0); if (hasResult()) compatRegs.set(0); regs = regs.subset(compatRegs); if (hasResult()) compatRegs.set(0, firstBit); if (regs.size() == 0) return null; return new HighRegisterPrefix(position, regs); }
/** * Gets the instruction prefix required, if any, to use in an expanded * version of this instance. Will not generate moves for registers * marked compatible to the format by the given BitSet. * * @see #expandedVersion * * @param compatRegs {@code non-null;} set of compatible registers * @return {@code null-ok;} the prefix, if any */ public DalvInsn expandedPrefix(BitSet compatRegs) { RegisterSpecList regs = registers; boolean firstBit = compatRegs.get(0); if (hasResult()) compatRegs.set(0); regs = regs.subset(compatRegs); if (hasResult()) compatRegs.set(0, firstBit); if (regs.size() == 0) return null; return new HighRegisterPrefix(position, regs); }
/** * Gets the instruction prefix required, if any, to use in an expanded * version of this instance. Will not generate moves for registers * marked compatible to the format by the given BitSet. * * @see #expandedVersion * * @param compatRegs {@code non-null;} set of compatible registers * @return {@code null-ok;} the prefix, if any */ public DalvInsn expandedPrefix(BitSet compatRegs) { RegisterSpecList regs = registers; boolean firstBit = compatRegs.get(0); if (hasResult()) compatRegs.set(0); regs = regs.subset(compatRegs); if (hasResult()) compatRegs.set(0, firstBit); if (regs.size() == 0) return null; return new HighRegisterPrefix(position, regs); }
/** * Gets the instruction that is equivalent to this one, except that * it uses sequential registers starting at {@code 0} (storing * the result, if any, in register {@code 0} as well). * * @return {@code non-null;} the replacement */ public DalvInsn getLowRegVersion() { RegisterSpecList regs = registers.withExpandedRegisters(0, hasResult(), null); return withRegisters(regs); }
/** * Gets the instruction that is equivalent to this one, except that * it uses sequential registers starting at {@code 0} (storing * the result, if any, in register {@code 0} as well). * * @return {@code non-null;} the replacement */ public DalvInsn getLowRegVersion() { RegisterSpecList regs = registers.withExpandedRegisters(0, hasResult(), null); return withRegisters(regs); }
/** * Gets the instruction that is equivalent to this one, except that * it uses sequential registers starting at {@code 0} (storing * the result, if any, in register {@code 0} as well). * * @return {@code non-null;} the replacement */ public DalvInsn getLowRegVersion() { RegisterSpecList regs = registers.withExpandedRegisters(0, hasResult(), null); return withRegisters(regs); }
/** * Gets the instruction that is equivalent to this one, except that * it uses sequential registers starting at {@code 0} (storing * the result, if any, in register {@code 0} as well). * * @return {@code non-null;} the replacement */ public DalvInsn getLowRegVersion() { RegisterSpecList regs = registers.withExpandedRegisters(0, hasResult(), null); return withRegisters(regs); }
/** * Gets the instruction that is equivalent to this one, except that * it uses sequential registers starting at {@code 0} (storing * the result, if any, in register {@code 0} as well). * * @return {@code non-null;} the replacement */ public DalvInsn getLowRegVersion() { RegisterSpecList regs = registers.withExpandedRegisters(0, hasResult(), null); return withRegisters(regs); }
/** * Gets the instruction that is equivalent to this one, except that * it uses sequential registers starting at {@code 0} (storing * the result, if any, in register {@code 0} as well). * * @return {@code non-null;} the replacement */ public DalvInsn getLowRegVersion() { RegisterSpecList regs = registers.withExpandedRegisters(0, hasResult(), null); return withRegisters(regs); }
/** * Gets the instruction that is equivalent to this one, except that * it uses sequential registers starting at {@code 0} (storing * the result, if any, in register {@code 0} as well). * * @return {@code non-null;} the replacement */ public DalvInsn getLowRegVersion() { RegisterSpecList regs = registers.withExpandedRegisters(0, hasResult(), null); return withRegisters(regs); }
/** * Gets the instruction that is equivalent to this one, except that * it replaces incompatible registers with sequential registers * starting at {@code 0} (storing the result, if any, in register * {@code 0} as well). The sequence of instructions from * {@link #expandedPrefix} and {@link #expandedSuffix} (if non-null) * surrounding the result of a call to this method are the expanded * transformation of this instance, and it is guaranteed that the * number of low registers used will be the number returned by * {@link #getMinimumRegisterRequirement}. * * @param compatRegs {@code non-null;} set of compatible registers * @return {@code non-null;} the replacement */ public DalvInsn expandedVersion(BitSet compatRegs) { RegisterSpecList regs = registers.withExpandedRegisters(0, hasResult(), compatRegs); return withRegisters(regs); }
/** * Gets the instruction that is equivalent to this one, except that * it replaces incompatible registers with sequential registers * starting at {@code 0} (storing the result, if any, in register * {@code 0} as well). The sequence of instructions from * {@link #expandedPrefix} and {@link #expandedSuffix} (if non-null) * surrounding the result of a call to this method are the expanded * transformation of this instance, and it is guaranteed that the * number of low registers used will be the number returned by * {@link #getMinimumRegisterRequirement}. * * @param compatRegs {@code non-null;} set of compatible registers * @return {@code non-null;} the replacement */ public DalvInsn expandedVersion(BitSet compatRegs) { RegisterSpecList regs = registers.withExpandedRegisters(0, hasResult(), compatRegs); return withRegisters(regs); }
/** * Gets the instruction that is equivalent to this one, except that * it replaces incompatible registers with sequential registers * starting at {@code 0} (storing the result, if any, in register * {@code 0} as well). The sequence of instructions from * {@link #expandedPrefix} and {@link #expandedSuffix} (if non-null) * surrounding the result of a call to this method are the expanded * transformation of this instance, and it is guaranteed that the * number of low registers used will be the number returned by * {@link #getMinimumRegisterRequirement}. * * @param compatRegs {@code non-null;} set of compatible registers * @return {@code non-null;} the replacement */ public DalvInsn expandedVersion(BitSet compatRegs) { RegisterSpecList regs = registers.withExpandedRegisters(0, hasResult(), compatRegs); return withRegisters(regs); }
/** * Gets the instruction that is equivalent to this one, except that * uses sequential registers starting at {@code 0} (storing * the result, if any, in register {@code 0} as well). The * sequence of instructions from {@link #hrPrefix} and {@link * #hrSuffix} (if non-null) surrounding the result of a call to * this method are the high register transformation of this * instance, and it is guaranteed that the number of low registers * used will be the number returned by {@link * #getMinimumRegisterRequirement}. * * @return {@code non-null;} the replacement */ public DalvInsn hrVersion() { RegisterSpecList regs = registers.withSequentialRegisters(0, hasResult()); return withRegisters(regs); }
/** * Gets the instruction suffix required, if any, to use in an expanded * version of this instance. Will not generate a move for a register * marked compatible to the format by the given BitSet. * * @see #expandedVersion * * @param compatRegs {@code non-null;} set of compatible registers * @return {@code null-ok;} the suffix, if any */ public DalvInsn expandedSuffix(BitSet compatRegs) { if (hasResult() && !compatRegs.get(0)) { RegisterSpec r = registers.get(0); return makeMove(position, r, r.withReg(0)); } else { return null; } }
/** * Gets the instruction suffix required, if any, to use in an expanded * version of this instance. Will not generate a move for a register * marked compatible to the format by the given BitSet. * * @see #expandedVersion * * @param compatRegs {@code non-null;} set of compatible registers * @return {@code null-ok;} the suffix, if any */ public DalvInsn expandedSuffix(BitSet compatRegs) { if (hasResult() && !compatRegs.get(0)) { RegisterSpec r = registers.get(0); return makeMove(position, r, r.withReg(0)); } else { return null; } }
/** * Gets the instruction suffix required, if any, to use in an expanded * version of this instance. Will not generate a move for a register * marked compatible to the format by the given BitSet. * * @see #expandedVersion * * @param compatRegs {@code non-null;} set of compatible registers * @return {@code null-ok;} the suffix, if any */ public DalvInsn expandedSuffix(BitSet compatRegs) { if (hasResult() && !compatRegs.get(0)) { RegisterSpec r = registers.get(0); return makeMove(position, r, r.withReg(0)); } else { return null; } }
/** * Gets the instruction suffix required, if any, to use in an expanded * version of this instance. Will not generate a move for a register * marked compatible to the format by the given BitSet. * * @see #expandedVersion * * @param compatRegs {@code non-null;} set of compatible registers * @return {@code null-ok;} the suffix, if any */ public DalvInsn expandedSuffix(BitSet compatRegs) { if (hasResult() && !compatRegs.get(0)) { RegisterSpec r = registers.get(0); return makeMove(position, r, r.withReg(0)); } else { return null; } }
/** * Gets the instruction suffix required, if any, to use in a high * register transformed version of this instance. * * @see #hrVersion * * @return {@code null-ok;} the suffix, if any */ public DalvInsn hrSuffix() { if (hasResult()) { RegisterSpec r = registers.get(0); return makeMove(position, r, r.withReg(0)); } else { return null; } }